Typical gate drive waveforms
The pictures below show some typical waveforms observed at the gates of MOSFETs when driven by gate-drive transformers. Ideally we want the waveform at the gate of a MOSFET to be very clean, with steep rising and falling edges, no overshoot, no ringing, and no droop to the tops and bottoms of the pulses. Unfortunately, this is rarely the case when gate drive transformers are used, and a number of things can go wrong.
The comments next to each picture indicate whether the waveform is satisfactory. The properties of the waveform are listed and in the cases where the waveform is not satisfactory, the reasons are given along with suggestions for improving the situation...
|Bad gate drive waveform with excessive low-frequency ringing.
- Severe low frequency ringing due to excessive leakage inductance in drive transformer.
- Totally unusable because ringing takes the MOSFET back into its linear region!
This cannot be corrected by increasing the damping resistance. It would need too much resistance, and the rising and falling edges would be too slow. We must reduce the excessive leakage inductance by redesigning the gate drive transformer.
|Poor gate drive waveform with excessive high-frequency ringing.
- Large overshoot at the switching transitions,
- Prolonged high-frequency ringing due to lack of any damping resistance.
- Totally unusable because ringing takes the MOSFET repeatedly into its linear region!
Add some damping resistance! Also try to reduce leakage inductance if you can.
|Good gate drive waveform except for overshoots.
+ Flat tops and bottoms to the pulses,
+ Steep rising and falling edges,
- Considerable overshoot at the transitions due to insufficient damping resistance,
- Some ringing after the transitions, but not too bad.
Increase series damping resistor slightly and the overshoot should diminish.
|The perfect gate drive waveform!
+ Flat tops and bottoms to the pulses,
+ Steep rising and falling edges,
+ Little overshoot at the switching transitions,
+ No ringing after the transitions,
No changes necessary if rise and fall times are less than 200ns or so.
|Slightly overdamped gate drive waveform.
- Leading edges of pulses are curved due to too much damping resistance,
- Slow rise & falling edges mean MOSFET spends longer than necessary changing state,
- This causes heating due to high switching losses.
Decrease the damping resistor, to make the rising and falling edges faster.
|Massively overdamped gate drive waveform.
- Waveform looks like "shark's fins" because of far to much damping resistance,
- Can also occur if the driver is totally inadequate to drive high gate capacitance,
- Totally unusable because MOSFETs would spend all their time in the linear region!
- This causes rapid overheating of the MOSFETs. Decrease the damping resistor, or use a more powerful gate drive IC.
|Slightly sloping tops and bottoms to waveform.
- The tops and bottoms of pulses droop slightly towards zero,
- Caused by low primary inductance. Too few turns on the drive transformer,
- This is not a problem as long as the amount of droop is less than a couple of volts,
Add a few more turns to the primary and secondary windings to reduce the droop.
|Excessively drooping tops and bottoms to waveform.
- The tops and bottoms of pulses slope steaply down towards zero,
- Far too low primary inductance. Either too few turns or wrong core material used.
- Unusable because the MOSFETs would start to turn off towards the end of the pulses!
Use many more turns or choose a core type with higher Specific Inductance (Al).
|Resonant gate drive, (Sinusoidal).
At very high switching frequencies it is possible to make use of the resonance caused by the leakage inductance and MOSFET gate capacitance. This technique is used to good effect in RF amplifiers that operate in the switching mode up to tens of megahertz! At first a sinusoidal waveform may not seem ideal for driving a MOSFET gate. However, it does have moderately fast rising and falling edges where the sinewave passes through zero.
This technique is only mentioned here for completeness. It is not commonly used below a couple of Megahertz. Squarewave drive always yields lower switching losses when possible.
However, you can read more information on high speed resonant gate drives here ########.
The Miller Effect
All of the pictures above show waveforms measured at the gate-source terminals of power MOSFETs with the device switching no current. Only the MOSFET gate was being driven during these tests. There was no voltage applied to the drain terminals of the devices and they were not switching any load current. This condition allows easy comparison between the merits of different gate drive schemes. It also allows changes to be made to the gate-drive circuit without the risk of damaging the MOSFET if the change resulted in an unsuitable drive waveform.
However, it is worth noting that this does not represent the real life situation where the MOSFET is switching considerable power. The gate drive waveforms actually change slightly when the MOSFET is switching real current. This behaviour is due to something called "Miller Capacitance" which exists between the Drain terminal and Gate terminal of a MOSFET. This capacitance has a "negative feedback" effect on the MOSFET when it is undergoing a switching transition, and actually tries to prolong the switching transition, increasing switching losses! The Miller effect is also most noticeable in applications such as ours where the MOSFETs are operated at relatively high drain to source voltages.
The animated picture below shows results generated by a computer simulation. It shows how the gate-drive waveform of one MOSFET in a half-bridge changes as the main high-voltage supply is gradually increased from zero to 400 volts.
Notice how little flat regions form part way up the rising and falling edges of the pulse waveforms. These plateau regions form because the Miller capacitance tries to hold the gate voltage at the MOSFET's threshold level while the device turns on or off. There are plateaus on both the positive and the negative pulses because two MOSFETs are being driven by one single gate drive transformer.
The duration of each plateau region corresponds with how long it takes for the MOSFET to transition through the linear region.
As the power supply voltage is increased the gate drive circuit has difficulty overcoming the Miller effect, and these flat regions become progressively longer. Therefore the MOSFET takes longer to transition through the linear region where power dissipation is high, and switching losses increase.
From this we can see that to achieve high efficiency, we really need to minimise the duration of these plateau regions. It is also apparent that the overall slope of the rising and falling edges of the gate drive waveform is less important than what happens in the short instant when the MOSFET switches. It is during the switching transitions when most gate drive circuits are stretched to their limits. As the MOSFET switches, the driver has to source maximum current because it is trying to increase the gate-source voltage, but the Miller effect is trying to hold it constant! It is the ability of a driver to overcome this effect that makes it win over a lesser gate drive circuit.
The point of this discussion is to show that you should really check the MOSFET gate waveforms right at the MOSFET device with some power applied to the bridge circuit. In many cases it is hard to observe the gate-source waveforms when the bridge circuit is being powered directly from the mains supply. Therefore, an isolated supply should be used. This can be via a mains isolating transformer, or a lower voltage power supply that provides isolation from the mains supply. Even if you can't check the waveforms with the full rated voltage applied to the MOSFETs, you should still check the waveforms at a lower voltage of 30 or 50 volts. This proves that there are no unforseen oscillations, and gives some degree of confidence that the gate drive waveforms will not change greatly when the supply is increased further.
The gate-source waveform is also influenced slightly by the load on the output of the inverter. This is because the Miller effect capacitively couples the drain to the gate of the MOSFET. In cases where the MOSFET switches on with zero voltage across it, the Miller effect is non-existant because there is no drain-source voltage at the switching time. However, the Miller effect still takes place when the device is turned off.
A more detailed explanation of the Miller effect and MOSFET switching in general can be found in most power electronics books. Several device manufacturers also provide literature covering this subject in some detail.
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